CMP process development and post-CMP defects studies on Cu/ultra low k materials with single damascene scheme

Advanced Metallization Conference (AMC)

Volumn , Issue , 2003, Pages 613-620

  Balakumar, S ^a   Tsang, Chi Fo ^a   Matsuki, Nobuo ^b  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b ASM Japan   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BRUSH CLEANING; BUFFING TIME; CMP DEFECTS; DAMASCENE SCHEME;

CHEMICAL MECHANICAL POLISHING; COPPER; DELAMINATION; DIELECTRIC LOSSES; LEAKAGE CURRENTS; PERMITTIVITY;

DIELECTRIC MATERIALS;

EID: 4043107897     PISSN: 15401766     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. International Technology Roadmap of Semiconductors Industry Association, Santa Clara, San Jose, Ca, 2001
2. th VLSI Multilevel Interconnection Conference, 2003 (accepted).
3. th CMP-MIC Conference, 2003, pp. 221-226