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Volumn 53, Issue 4, 2004, Pages 1159-1166

A criterion for optimizing bit-reduced post-correction of AD converters

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANALOG TO DIGITAL CONVERSION; CALIBRATION; DATA STORAGE EQUIPMENT; MATHEMATICAL TRANSFORMATIONS; MATRIX ALGEBRA; OPTIMIZATION; SIGNAL TO NOISE RATIO; TABLE LOOKUP;

EID: 4043067072     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2004.831441     Document Type: Article
Times cited : (17)

References (14)
  • 2
    • 0026205931 scopus 로고
    • Improved compensation for analog-to-digital converters
    • Aug
    • F. H. Irons, D. M. Hummels, and S. P. Kennedy, "Improved compensation for analog-to-digital converters," IEEE Trans. Circuits Syst. II, vol. 38, pp. 958-961, Aug. 1991.
    • (1991) IEEE Trans. Circuits Syst. II , vol.38 , pp. 958-961
    • Irons, F.H.1    Hummels, D.M.2    Kennedy, S.P.3
  • 5
    • 0038496173 scopus 로고    scopus 로고
    • Analog-to-digital converter error correction using frequency selective tables
    • Stockholm, Sweden, June
    • H. Lundin, T. Andersson, M. Skoglund, and P. Händel, "Analog-to-digital converter error correction using frequency selective tables," in Radio Vetenskap och Kommunikation (RVK), Stockholm, Sweden, June 2002, pp. 487-490.
    • (2002) Radio Vetenskap Och Kommunikation (RVK) , pp. 487-490
    • Lundin, H.1    Andersson, T.2    Skoglund, M.3    Händel, P.4
  • 6
    • 0024900988 scopus 로고
    • Real-time equalization of A/D converter nonlinearities
    • Portland, OR. USA
    • D. Moulin, "Real-time equalization of A/D converter nonlinearities," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, Portland, OR. USA, 1989, pp. 262-267.
    • (1989) Proc. IEEE Int. Symp. Circuits and Systems , vol.1 , pp. 262-267
    • Moulin, D.1
  • 9
    • 0022564875 scopus 로고
    • Dynamic characterization and compensation of analog to digital converters
    • F. H. Irons, "Dynamic characterization and compensation of analog to digital converters," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 3, 1986, pp. 1273-1277.
    • (1986) Proc. IEEE Int. Symp. Circuits and Systems , vol.3 , pp. 1273-1277
    • Irons, F.H.1
  • 10
    • 0023211501 scopus 로고
    • A phase-plane approach to the compensation of high-speed analog-to-digital converters
    • T. A. Rebold and F. H. Irons, "A phase-plane approach to the compensation of high-speed analog-to-digital converters," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, 1987, pp. 455-458.
    • (1987) Proc. IEEE Int. Symp. Circuits and Systems , vol.2 , pp. 455-458
    • Rebold, T.A.1    Irons, F.H.2
  • 11
    • 0020102027 scopus 로고
    • Least squares quantization in PCM
    • Mar
    • S. P. Lloyd, "Least squares quantization in PCM," IEEE Trans. Inform. Theory, vol. IT-28, pp. 129-137, Mar. 1982.
    • (1982) IEEE Trans. Inform. Theory , vol.IT-28 , pp. 129-137
    • Lloyd, S.P.1
  • 13
    • 13244279557 scopus 로고    scopus 로고
    • Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters
    • to be published
    • H. Lundin, M. Skoglund, and P. Händel, "Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters," IEEE Trans. Signal Processing, to be published.
    • IEEE Trans. Signal Processing
    • Lundin, H.1    Skoglund, M.2    Händel, P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.