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Volumn 13, Issue 1, 2008, Pages

SoCDAL: System-on-chip design AcceLerator

Author keywords

Application to architecture mapping; Codesign; Multiprocessor system on chip; Process networks; Scheduling; Simulation; Specification; Static hardware software estimation; Synchronous dataflow; Transaction level model; Worst case execution time

Indexed keywords

APPLICATION-TO-ARCHITECTURE MAPPING; MULTIPROCESSOR SYSTEM-ON-CHIP; PROCESS NETWORKS; SYNCHRONOUS DATAFLOW; TRANSACTION-LEVEL MODELS;

EID: 40049094644     PISSN: 10844309     EISSN: 15577309     Source Type: Journal    
DOI: 10.1145/1297666.1297683     Document Type: Article
Times cited : (19)

References (54)
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