A 1.1GHz charge-recovery logic

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Sathe, Visvesh ^a   Chueh, Juang Ying ^a   Papaefthymiou, Marios ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC CHARGE RECOVERY LOGIC; ON CHIP CLOCK GENERATORS;

CHIP SCALE PACKAGES; CMOS INTEGRATED CIRCUITS; ELECTRIC CLOCKS; NATURAL FREQUENCIES; TIMING CIRCUITS;

LOGIC CIRCUITS;

EID: 39749191449     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)