Precursor ISI reduction in high-speed I/O

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2007, Pages 134-135

  Ren, Jihong ^a   Lee, Haechang ^a   Lin, Qi ^a   Leibowitz, Brian ^a   Chen, E Hung ^b   Oh, Dan ^a   Lambrecht, Frank ^a   Stojanović, Vladimir ^a,c   Yang, Chih Kong Ken ^b   Zerbe, Jared ^a  

^a RAMBUS INC   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BACKPLANE CHANNELS; DATA RATES; DECISION FEEDBACK EQUALIZATION (DFE); INTER SYMBOL INTERFERENCE;

BIT ERROR RATE; CONSTRAINT THEORY; DECISION MAKING; FEEDBACK;

CHANNEL CAPACITY;

EID: 39749126326     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2007.4342687     Document Type: Conference Paper

References (5)