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Volumn 4, Issue , 2006, Pages 2642-2647

A uniform framework of low power FSM partition approach

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COST FUNCTIONS; ENERGY DISSIPATION; FINITE AUTOMATA; MATHEMATICAL MODELS; OPTIMAL CONTROL SYSTEMS;

EID: 39749091098     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCCAS.2006.285215     Document Type: Conference Paper
Times cited : (15)

References (10)
  • 2
    • 2942586356 scopus 로고    scopus 로고
    • Low Power Realization of Finite State Machines - A Decomposition Approach
    • S. H. Chow, Y. C. Ho, and T. Hwang, "Low Power Realization of Finite State Machines - A Decomposition Approach", ACM Trans. On Design Automation of System, Vol. 1, pp. 315-340, 1996.
    • (1996) ACM Trans. On Design Automation of System , vol.1 , pp. 315-340
    • Chow, S.H.1    Ho, Y.C.2    Hwang, T.3
  • 4
    • 39749127325 scopus 로고    scopus 로고
    • Design Automation Conf., San Francisco, USA, pp. 758-763, June 15-19 1998.
    • Design Automation Conf., San Francisco, USA, pp. 758-763, June 15-19 1998.
  • 6
    • 0031628339 scopus 로고    scopus 로고
    • Proc. IEEE International Symposium on Circuits and Systems, Monterey, USA, May 3 l-.Iune 3
    • L. Benini, G. D. Micheli and F. Vermeulen, "Finite-State Machine Partitioning For Low Power", In Proc. IEEE International Symposium on Circuits and Systems, Monterey, USA, Vol. 2, pp. 5-8, May 3 l-.Iune 3, 1998,
    • (1998) Finite-State Machine Partitioning For Low Power , vol.2 , pp. 5-8
    • Benini, L.1    Micheli, G.D.2    Vermeulen, F.3
  • 7
    • 0036630497 scopus 로고    scopus 로고
    • Genetic algoritlun based state assignment for power and area optimization
    • Y. Xia and A.E.A. Almaini, "Genetic algoritlun based state assignment for power and area optimization", IEE Proc. -Comput. Digit. Tech., Vol. 149, pp. 28-133, 2002.
    • (2002) IEE Proc. -Comput. Digit. Tech , vol.149 , pp. 28-133
    • Xia, Y.1    Almaini, A.E.A.2
  • 8
    • 13944256596 scopus 로고    scopus 로고
    • Mixed synchronous/asynchronous state memory for low power FSM design
    • Rennes, France, pp, Aug. 31-Sept. 3
    • C. Cao and B. Oelmann, "Mixed synchronous/asynchronous state memory for low power FSM design" in Proc. of the Euromicro Sytems on Digital Systems Design Rennes, France, pp. 363-370, Aug. 31-Sept. 3, 2004."
    • (2004) Proc. of the Euromicro Sytems on Digital Systems Design , pp. 363-370
    • Cao, C.1    Oelmann, B.2
  • 9
    • 0003934798 scopus 로고
    • SIS: System for sequential circuit synthesis
    • Tech. Rep. M92/41, Electronic Research laboratorv, College of Engineering, University of Califomia,Berkeley
    • E. Sentovich, K. Singh,et al., "SIS: system for sequential circuit synthesis", Tech. Rep. M92/41, Electronic Research laboratorv, College of Engineering, University of Califomia,Berkeley 1992.
    • (1992)
    • Sentovich, E.1    Singh, K.2
  • 10
    • 84941358530 scopus 로고    scopus 로고
    • GALLOP: Genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignmenf
    • New Delhi, India, pp, Jan. 4-8
    • G. Venkataraman, S. Reddy, I. Pomeranz, "GALLOP: genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignmenf'.in Proc. Of 16th International Conf. On VLSI Design, New Delhi, India, pp, 533-538, Jan. 4-8, 2003.
    • (2003) Proc. Of 16th International Conf. On VLSI Design , pp. 533-538
    • Venkataraman, G.1    Reddy, S.2    Pomeranz, I.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.