On the performance of incremental redundancy hybrid ARQ schemes with rate compatible LDPC codes

2006 International Conference on Communications, Circuits and Systems, ICCCAS, Proceedings

Volumn 2, Issue , 2006, Pages 731-734

  Wen, Hong ^a   Zhou, Liang ^a   Fu, Chusheng ^a  

^a UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA   (China)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FADING CHANNELS; MATRIX ALGEBRA; PATTERN MATCHING; REDUNDANCY;

PARITY CHECK MATRIX; RATE MATCHING;

CODES (SYMBOLS);

EID: 39749088119     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCCAS.2006.284758     Document Type: Conference Paper

References (7)

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3. Stefania S., Giuseppe C., and Guillaume V. Incremental Redundancy Hybrid ARQ Schemes Based on Low-Density Parity-Check Codes. IT. 52(8):21-28, Aug.2004.
4. Wang. Yafeng Yang Hongwen Yang Dacheng. Perfonnaoe Analysis of Type III HARQ with. Turbo codes. Journal of China Institute of Communications 2004,25(6): 139-146.
5. J.Hagenauer, Rate-compatible punctured convolutional codes, IEEE Trans. Comm., 1988, 36(4): 389-400.
6. th, 2005
7. Li Ping, W. K. Leung and Nam, Phamdo, Low density parity check codes with semi- random parity check matrix, Electron. Lett., 1999, 35(1): 38-39.