4GHz+ Low-latency fixed-point and binary floating-point execution units for the POWER6 processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Curran, B ^a   McCredie, B ^a   Sigal, L ^a   Schwarz, E ^a   Fleischer, B ^a   Chan, Y H ^a   Webber, D ^a   Vaden, M ^a   Goyal, A ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FIXED-POINT EXECUTION UNIT; LOGICAL OPERATIONS; LOW-LATENCY;

CMOS INTEGRATED CIRCUITS; FORMAL LOGIC; SILICON ON INSULATOR TECHNOLOGY;

PROGRAM PROCESSORS;

EID: 39749083510     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)