5.8 GHz RF transceiver LSI including on-chip matching circuits

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 2006, Pages

  Nagata, Minoru ^a   Masuoka, Hideaki ^a   Fukase, Shin Ichi ^a   Kikuta, Makoto ^a   Morita, Makoto ^a   Itoh, Nobuyuki ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; LOW NOISE AMPLIFIERS; MAGNETIC COUPLINGS; TRANSCEIVERS; VARIABLE FREQUENCY OSCILLATORS;

AMPLITUDE CONTROL; ELECTRONIC TOLL COLLECTION SYSTEMS;

LSI CIRCUITS;

EID: 39049110133     PISSN: 10889299     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BIPOL.2006.311172     Document Type: Conference Paper

References (2)

1. T. Matsuda, K. Ohhata, N. Shiramizu, S. Hanazawa, M. Kudoh, Y. Tanha, Y. Takeuchi, H. Shimamoto, T. Nagashima, K. Washio, "Single-chip 5.8GHz ETC transceiver IC with PLL and demodulation circuits using SiGe HBT/CMOS," Digest of Technical Papers of ISSCC, pp. 96-97, February, 2002.
2. Japanese Ministray of Land, Infrastructure, and Transport, Road Burreau. Introduction about Japanese elecrtonic toll collection system. Online at: http://www.mlit.go.jp/road/ITS/