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Volumn , Issue , 2007, Pages 46-49

A 30 GS/s 4-bit binary weighted DAC in SiGe BiCMOS technology

Author keywords

Bipolar circuit; Current steering DAC; High speed logic; Resistive weighting; Unary weighted architecture

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BIPOLAR INTEGRATED CIRCUITS; ELECTRIC CURRENTS; FORMAL LOGIC;

EID: 39049102437     PISSN: 10889299     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BIPOL.2007.4351836     Document Type: Conference Paper
Times cited : (13)

References (12)
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  • 3
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  • 4
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    • Baranauskas, D.1    Zelenin, D.2
  • 5
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    • Trensmitter Utilising Bandpass Delta-Sigma Modulator and Switech Mode Power Amplifier
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  • 6
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  • 7
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    • A 3V CMOS 400mW 14b 1.4GS/S DAC for Multi-Carrier Applications
    • B. Schafferer, R. Adams, "A 3V CMOS 400mW 14b 1.4GS/S DAC for Multi-Carrier Applications" Proc. ISSCC, pp.360-361, 532, 2004.
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  • 8
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    • Novel Collector Design for High-Speed SiGe:C HBTs
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  • 9
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  • 11
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  • 12
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.