Secure FPGA circuits using controlled placement and routing

CODES+ISSS 2007: International Conference on Hardware/Software Codesign and System Synthesis

Volumn , Issue , 2007, Pages 45-50

  Yu, Pengyuan ^a   Schaumont, Patrick ^a  

^a State University   (United States)

Author keywords

Design; Experimentation; Measurement; Security

Indexed keywords

EXPERIMENTATION; LOGIC ARCHITECTURE; LOGIC FUNCTIONS;

CRYPTOGRAPHY; ELECTRIC POWER UTILIZATION; FORMAL LOGIC; ROUTING ALGORITHMS; SECURITY OF DATA;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 38849202349     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1289816.1289831     Document Type: Conference Paper

References (8)

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