Compact HSPICE model for IMOS device

Electronics Letters

Volumn 44, Issue 2, 2008, Pages 91-92

  Lin, J ^a   Toh, E H ^a   Shen, C ^a   Sylvester, D ^b   Heng, C H ^a   Samudra, G ^a   Yeo, Y C ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SIMULATION; COMPUTER AIDED DESIGN; IMPACT IONIZATION; MATHEMATICAL MODELS; TABLE LOOKUP;

IMOS DEVICES; IMOS-BASED CIRCUITS;

SPICE;

EID: 38649123025     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20083116     Document Type: Article

References (4)

1. Gopalakrishnan, K., Griffin, P.B., and Plummer, J.D.: ' I-MOS: a novel semiconductor device with a subthreshold slope lower than kT/q ', IEEE IEDM, San Francisco, CA, USA, December, 2002, p. 289-292
2. Toh, E.-H., Wang, G.H., Lo, G.-Q., Balasubramanian, N., Tung, C.-H., Benistant, F., Chan, L., Samudra, G., and Yeo, Y.-C.: ' A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistor ', IEEE IEDM, DC, Washington, USA, December, 2005, p. 951-954
3. Shen, C., Lin, J.-Q., Toh, E.-H., Chang, K.-F., Bai, P., Heng, C.-H., Samudra, G.S., and Yeo, Y.-C.: ' On the performance limit of impact-ionization transistors ', IEEE IEDM, DC, Washington, USA, 2007, p. 117-120
4. Sze, S.M.: ' Physics of semiconductor devices ', (Wiley-Interscience, 1981), p. 566