Reconfigurable logic: Hardware speed with software flexibility

EDN

Volumn 41, Issue 7, 1996, Pages 53-64

  Conner, Doug ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

EID: 3843085052     PISSN: 00127515     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (3)

1. Athanas, Peter, and Kenneth Pocek, Editors, IEEE Symposium on FPGAs for Custom Computing Machines, 1995.
2. Schewel, John, Editor, SPIE Proceedings on Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, 1995, Vol 2607.
3. http://www.reconfig.com on the Internet