An analytical charge-based compact delay model for submicrometer CMOS inverters

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 7, 2004, Pages 1301-1311

  Rosselló, José Luis ^a   Segura, Jaume ^a  

^a UNIVERSITAT DE LES ILLES BALEARS   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; DIFFERENTIAL EQUATIONS; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SHORT CIRCUIT CURRENTS;

ANALYTICAL MODEL; CIRCUIT MODELING; DELAY ESTIMATION; SUBMICROMETER INVERTERS;

ELECTRIC INVERTERS;

EID: 3843064540     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2004.830692     Document Type: Article

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