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Volumn , Issue , 2007, Pages 419-424

Comparing simulation alternatives of FPGA-based controllers for switching converters

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION LANGUAGES; DIGITAL ARITHMETIC; ELECTRON TUBES; ELECTRONICS INDUSTRY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NETWORKS (CIRCUITS); POWER CONVERTERS; SWITCHING CIRCUITS; TECHNICAL PRESENTATIONS;

EID: 38349058894     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISIE.2007.4374634     Document Type: Conference Paper
Times cited : (12)

References (8)
  • 1
    • 0033079250 scopus 로고    scopus 로고
    • Design methodologies based on Hardware Description Languages
    • February
    • T. Riesgo, Y. Torroja, and E. de la Torre, "Design methodologies based on Hardware Description Languages," IEEE Trans. Industrial Electronics, vol. 46, no. 1, pp. 3-12, February 1999.
    • (1999) IEEE Trans. Industrial Electronics , vol.46 , Issue.1 , pp. 3-12
    • Riesgo, T.1    Torroja, Y.2    de la Torre, E.3
  • 2
    • 13144276358 scopus 로고    scopus 로고
    • VHDL-AMS and Verilog-AMS as Alternative Hardware Description Languages for Efficient Modeling of Multidiscipline Systems
    • February
    • F. Pêcheux, C. Lallement, and A. Vachoux, "VHDL-AMS and Verilog-AMS as Alternative Hardware Description Languages for Efficient Modeling of Multidiscipline Systems," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst , vol. 24, no. 2, pp. 204-225, February 2005.
    • (2005) IEEE Trans. Comput.-Aided Design Integr. Circuits Syst , vol.24 , Issue.2 , pp. 204-225
    • Pêcheux, F.1    Lallement, C.2    Vachoux, A.3
  • 5
    • 50049136396 scopus 로고    scopus 로고
    • D. Mitchell, and B. Mammano, Designing Stable Control Loops, Unitrode Design Seminars SEM-1400, Topic 5, pp. 5.1-5.30, 2001. TI Literature No. SLUP173.
    • D. Mitchell, and B. Mammano, "Designing Stable Control Loops," Unitrode Design Seminars SEM-1400, Topic 5, pp. 5.1-5.30, 2001. TI Literature No. SLUP173.
  • 7
    • 50049105360 scopus 로고    scopus 로고
    • Southampton VHDL-AMS Validation Suite - example 8
    • T. Kazmierski, "VHDL-AMS model of Switch-Mode Power Regulator," Southampton VHDL-AMS Validation Suite - example 8, http://www.syssim. ecs.soton.ac.uk/vhdl-ams/examples/smpr.htm, 1997.
    • (1997)
    • Kazmierski, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.