Router architecture for high-performance NoCs

Proceedings - SBCCI 2007: 20th Symposium on Integrated Circuits and System Design

Volumn , Issue , 2007, Pages 111-116

  Carara, Everton ^a   Moraes, Fernando ^a   Calazans, Ney ^a  

^a PONTIFICAL CATHOLIC UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

Networks on chip; Session layer; Switching modes; Virtual channels

Indexed keywords

ELECTRIC POWER UTILIZATION; PACKET NETWORKS; QUALITY OF SERVICE; ROUTERS; SYNCHRONIZATION; VIRTUAL REALITY;

APPLICATION MODULES; NETWORKS ON CHIP; SESSION LAYERS; SWITCHING MODES; VIRTUAL CHANNELS;

MICROPROCESSOR CHIPS;

EID: 37849002846     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1284480.1284515     Document Type: Conference Paper

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