FPGA prototyping of spatio-temporal 2D IIR broadband beam plane-wave filters

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn , Issue , 2006, Pages 542-545

  Madanayake, H L P Arjuna ^a,b   Bruton, Len T ^a,b  

^a IEEE

^b UNIVERSITY OF CALGARY   (Canada)

Author keywords

2D IIR; Beam; Broadband; Filter; FPGA; Frequency planar; Plane wave; Xilinx

Indexed keywords

DIGITAL FILTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY RESPONSE; IMPULSE RESPONSE; NETWORKS (CIRCUITS); NUMERICAL ANALYSIS; OCCUPATIONAL RISKS; SENSORS; TELECOMMUNICATION SYSTEMS; WAVE ENERGY CONVERSION; WAVE FILTERS;

2D IIR; A/D CONVERTERS; ASIA-PACIFIC; BEAM; BROADBAND; BROADBAND FREQUENCIES; CIRCUIT IMPLEMENTATIONS; FILTER; FIRST ORDERS; FPGA; FPGA DEVICES; FPGA PROTOTYPING; FREQUENCY-PLANAR; HIGH TEMPORAL; IIR DIGITAL FILTERS; INFINITE IMPULSE RESPONSE; INTERCONNECTIVITY; LINEAR SENSORS; PLANAR BEAMS; PLANE WAVE; PLANE WAVES; SAMPLE RATE; SINGLE CHIPS; SPATIO-TEMPORAL; VLSI ARCHITECTURES; XILINX; XILINX VIRTEX;

IIR FILTERS;

EID: 37649022276     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2006.342528     Document Type: Conference Paper

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