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Volumn , Issue , 2007, Pages 3-
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Enabling technology for on-chip interconnection networks
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Author keywords
[No Author keywords available]
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Indexed keywords
NETWORK TOPOLOGY;
ON-CHIP INTERCONNECTION NETWORKS;
STANDARD CELL METHODOLOGY;
MICROPROCESSOR CHIPS;
ROUTERS;
SWITCHING CIRCUITS;
TOPOLOGY;
INTERCONNECTION NETWORKS;
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EID: 36349035129
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/NOCS.2007.17 Document Type: Conference Paper |
Times cited : (12)
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References (0)
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