Essential issues for IP reuse

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2000, Pages 37-42

  Gajski, Daniel D ^a   Wu, Allen C H ^b   Chaiyakul, Viraphol ^c   Mori, Shojiro ^d   Nukiyama, Tom ^e   Bricaud, Pierre ^f  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^c Y Explorations Inc   (United States)

^d TOSHIBA CORPORATION   (Japan)

^e NEC CORPORATION   (Japan)

^f MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

IP REUSE; SEMICONDUCTOR INDUSTRY; SYSTEM-ON-A-CHIP;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; SEMICONDUCTOR DEVICE MANUFACTURE;

COMPUTER AIDED DESIGN;

EID: 36348990632     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368504     Document Type: Conference Paper

References (5)

1. EE Times Online IP Watch, http://www.eet.com
2. Michael Keating and Pierre Bricaud, Reuse Methodology Manual, Kluwer Academic Publishers, 1999.
3. VSIA, http://www.vsi.org
4. VCX, http://www.vcx.org
5. Daniel D Gajski, "IP-based Design methodology", http://www.ics.uci.edu/~gajski