A flexible selective harmonic mitigation technique to meet grid codes in three-level PWM converters

IEEE Transactions on Industrial Electronics

Volumn 54, Issue 6, 2007, Pages 3022-3029

  Garcia Franquelo, Leopoldo ^a   Nápoles, Javier ^a   Portillio Guisado, Ramón C ^a   Leon, José Ignacio ^a   Aguirre, Miguel A ^a  

^a UNIVERSITY OF SEVILLE   (Spain)

Author keywords

Harmonic distortion; Multilevel converters; Optimization methods; Pulsewidth modulated power converters

Indexed keywords

HARMONIC DISTORTION; OPTIMIZATION; PULSE WIDTH MODULATION; SWITCHING; CODES (SYMBOLS); COUNTING CIRCUITS; HEURISTIC ALGORITHMS; HEURISTIC METHODS; POWER CONVERTERS;

GRID CODES; MULTILEVEL CONVERTERS; PULSEWIDTH-MODULATED POWER CONVERTERS;

POWER CONVERTERS; HARMONIC ANALYSIS;

DIODE-CLAMPED; GLOBAL PROBLEMS; GRID CODES; GRID CONNECTIONS; HARMONIC CONTENTS; HARMONIC CONTROL; HARMONIC MITIGATION; HIGH POWER APPLICATIONS; HIGH QUALITY; MULTILEVEL CONVERTER; OPTIMIZATION METHODS; OUTPUT SIGNAL; POWER DEVICES; PULSEWIDTH-MODULATED POWER CONVERTERS; PWM CONVERTER; SELECTIVE HARMONIC ELIMINATION; SPECIFIC HARMONICS; SWITCHING CONSTRAINTS; TEST BENCHES; THREE-LEVEL; TOTAL HARMONIC DISTORTIONS; TUNED FILTER;

EID: 36248944953     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2007.907045     Document Type: Article

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