Exploring the cache design space for web servers

Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001

Volumn , Issue , 2001, Pages

  Iyer, R ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; DESIGN; HUMAN COMPUTER INTERACTION; INTERNET; PARALLEL PROCESSING SYSTEMS; WEB SERVICES; WORLD WIDE WEB;

CACHE HIERARCHIES; CACHE PERFORMANCE; END-USER SATISFACTIONS; FUTURE PERFORMANCE; INSTRUCTION FETCH; INTERNET SERVERS; PERFORMANCE IMPACT; SPATIAL AND TEMPORAL LOCALITY;

INTEGRATED CIRCUIT DESIGN;

EID: 3543127607     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2001.925013     Document Type: Conference Paper

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