-
2
-
-
84899688494
-
The NAS parallel benchmarks - summary and preliminary results
-
D. H. Bailey, E. Barszcz, J. T. Barton, D. S. Browning, R. L. Carter, L. Dagum, R. A. Fatoohi, P. O. Frederickson, T. A. Lasinski, R. S. Schreiber, H. D. Simon, V. Venkatakrishnan, and S. K. Weeratunga. The NAS parallel benchmarks - summary and preliminary results. In Proceedings of the ACM/IEEE conference on Supercomputing, 1991.
-
(1991)
Proceedings of the ACM/IEEE conference on Supercomputing
-
-
Bailey, D.H.1
Barszcz, E.2
Barton, J.T.3
Browning, D.S.4
Carter, R.L.5
Dagum, L.6
Fatoohi, R.A.7
Frederickson, P.O.8
Lasinski, T.A.9
Schreiber, R.S.10
Simon, H.D.11
Venkatakrishnan, V.12
Weeratunga, S.K.13
-
3
-
-
35348828357
-
-
G. E. Blelloch. NESL: A Nested Data-Parallel Language Version 2.6, Pittsburgh, PA, USA, 1993
-
G. E. Blelloch. NESL: A Nested Data-Parallel Language (Version 2.6). Pittsburgh, PA, USA, 1993.
-
-
-
-
4
-
-
0029191296
-
Cilk: An efficient multithreaded runtime system
-
R. D. Blumofe, C. F. Joerg, B. C. Kuszmaul, C. E. Leiserson, K. H. Randall, and Y. Zhou. Cilk: an efficient multithreaded runtime system. In Proceedings of the fifth ACM SIGPLAN symposium on Principles and practice of parallel programming, 1995.
-
(1995)
Proceedings of the fifth ACM SIGPLAN symposium on Principles and practice of parallel programming
-
-
Blumofe, R.D.1
Joerg, C.F.2
Kuszmaul, B.C.3
Leiserson, C.E.4
Randall, K.H.5
Zhou, Y.6
-
5
-
-
0000269759
-
Scheduling multithreaded computations by work stealing
-
R. D. Blumofe and C. E. Leiserson. Scheduling multithreaded computations by work stealing. Journal of ACM, 46(5):720-748, 1999.
-
(1999)
Journal of ACM
, vol.46
, Issue.5
, pp. 720-748
-
-
Blumofe, R.D.1
Leiserson, C.E.2
-
7
-
-
0022808786
-
-
J. Canny. A Computational Approach to Edge Detection. IEEE Trans. on Pattern Analysis and Machine Intelligence, 8(6):679-698, 1986.
-
J. Canny. A Computational Approach to Edge Detection. IEEE Trans. on Pattern Analysis and Machine Intelligence, 8(6):679-698, 1986.
-
-
-
-
9
-
-
34547497052
-
Hardware-modulated parallelism in chip multiprocessors
-
J. Chen, P. Juang, K. Ko, G. Contreras, D. Penry, R. Rangan, A. Stoler, L.-S. Peh, and M. Maitonosi. Hardware-modulated parallelism in chip multiprocessors. SIGARCH Comput. Archit. News, 33(4):54-63, 2005.
-
(2005)
SIGARCH Comput. Archit. News
, vol.33
, Issue.4
, pp. 54-63
-
-
Chen, J.1
Juang, P.2
Ko, K.3
Contreras, G.4
Penry, D.5
Rangan, R.6
Stoler, A.7
Peh, L.-S.8
Maitonosi, M.9
-
10
-
-
33749064644
-
Recognition, Mining and Synthesis Moves Computers to the Era of Tera
-
February
-
P. Dubey. Recognition, Mining and Synthesis Moves Computers to the Era of Tera. Technology@Intel Magazine, February 2005.
-
(2005)
Technology@Intel Magazine
-
-
Dubey, P.1
-
13
-
-
34247376580
-
Chip multiprocessing and the cell broadband engine
-
New York, NY, USA, ACM Press
-
M. Gschwind. Chip multiprocessing and the cell broadband engine. In CF '06: Proceedings of the 3rd conference on Computing frontiers, pages 1-8, New York, NY, USA, 2006. ACM Press.
-
(2006)
CF '06: Proceedings of the 3rd conference on Computing frontiers
, pp. 1-8
-
-
Gschwind, M.1
-
15
-
-
33845884291
-
Multiple instruction stream processor
-
R. A. Hankins, G. N. Chinya, J. D. Collins, P. H. Wang, R. Rakvic, H. Wang, and J. P. Shen. Multiple instruction stream processor. In Proceedings of the 33rd annual international symposium on Computer Architecture, 2006.
-
(2006)
Proceedings of the 33rd annual international symposium on Computer Architecture
-
-
Hankins, R.A.1
Chinya, G.N.2
Collins, J.D.3
Wang, P.H.4
Rakvic, R.5
Wang, H.6
Shen, J.P.7
-
17
-
-
35348914197
-
-
High Performance Fortran Forum. High Performance Fortran Language Specification, version2.0, 1997.
-
High Performance Fortran Forum. High Performance Fortran Language Specification, version2.0, 1997.
-
-
-
-
20
-
-
0003890315
-
-
Prentice Hall, third edition
-
J. C. Hull. Options, Futures, and Other Derivatives, pages 346-348. Prentice Hall, third edition, 1996.
-
(1996)
Options, Futures, and Other Derivatives
, pp. 346-348
-
-
Hull, J.C.1
-
23
-
-
0347656830
-
A comparison of task pools for dynamic load balancing of irregular algorithms: Research articles
-
M. Korch and T. Rauber. A comparison of task pools for dynamic load balancing of irregular algorithms: Research articles. Concurr. Comput. : Pract. Exper, 16(1), 2004.
-
(2004)
Concurr. Comput. : Pract. Exper
, vol.16
, Issue.1
-
-
Korch, M.1
Rauber, T.2
-
24
-
-
0002050141
-
Static scheduling algorithms for allocating directed task graphs to multiprocessors
-
Y.-K. Kwok and I. Ahmad. Static scheduling algorithms for allocating directed task graphs to multiprocessors. ACM Comput. Surv., 31(4):406-471, 1999.
-
(1999)
ACM Comput. Surv
, vol.31
, Issue.4
, pp. 406-471
-
-
Kwok, Y.-K.1
Ahmad, I.2
-
25
-
-
2942716356
-
-
LBN/PUB-5483, Oct
-
C. W. McCurdy, R. Stevens, H. Simon, W. Kramer, D. Bailey, W. Johnston, C. Catlett, R. Lusk, T. Morgan, J. Meza, M. Banda, J. Leighton, and J. Hules. Creating science-driven computer architecture: A new path to scientific leadership. LBN/PUB-5483, Oct. 2002.
-
(2002)
Creating science-driven computer architecture: A new path to scientific leadership
-
-
McCurdy, C.W.1
Stevens, R.2
Simon, H.3
Kramer, W.4
Bailey, D.5
Johnston, W.6
Catlett, C.7
Lusk, R.8
Morgan, T.9
Meza, J.10
Banda, M.11
Leighton, J.12
Hules, J.13
-
29
-
-
35348913582
-
-
OpenMP Application Program Interface. Version 2.5
-
OpenMP Application Program Interface. Version 2.5.
-
-
-
-
30
-
-
2842513495
-
Thread scheduling for cache locality
-
J. Philbin, J. Edler, O. J. Anshus, C. C. Douglas, and K. Li. Thread scheduling for cache locality. In Architectural Support for Programming Languages and Operating Systems, pages 60-71, 1996.
-
(1996)
Architectural Support for Programming Languages and Operating Systems
, pp. 60-71
-
-
Philbin, J.1
Edler, J.2
Anshus, O.J.3
Douglas, C.C.4
Li, K.5
-
31
-
-
0004161838
-
-
Cambridge University Press, second edition
-
W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery Numerical Recipes in C: The Art of Scientific Computing, pages 866-868. Cambridge University Press, second edition, 1992.
-
(1992)
Numerical Recipes in C: The Art of Scientific Computing
, pp. 866-868
-
-
Press, W.H.1
Teukolsky, S.A.2
Vetterling, W.T.3
Flannery, B.P.4
-
32
-
-
35348814174
-
Cool Codes for Hot Chips: A Quantitative Basis for Multi-Core Design
-
J. Rattner. Cool Codes for Hot Chips: A Quantitative Basis for Multi-Core Design. HotChips keynote presentation, 2006.
-
(2006)
HotChips keynote presentation
-
-
Rattner, J.1
-
33
-
-
33845440191
-
Science-driven system, architecture: A new process for leadership class computing
-
Jan
-
H. Simon, W. Kramer, W. Saphir, J. Shalf, D. Bailey, L. Oliker, M. Banda, C. W. McCurdy, J. Hules, A. Canning, M. Day, P. Colella, D. Serafini, M. Wehner, and P. Nugent. Science-driven system, architecture: A new process for leadership class computing. Journal of the Earth Simulator, 2, Jan. 2005.
-
(2005)
Journal of the Earth Simulator
, vol.2
-
-
Simon, H.1
Kramer, W.2
Saphir, W.3
Shalf, J.4
Bailey, D.5
Oliker, L.6
Banda, M.7
McCurdy, C.W.8
Hules, J.9
Canning, A.10
Day, M.11
Colella, P.12
Serafini, D.13
Wehner, M.14
Nugent, P.15
-
34
-
-
27844607771
-
Compiler support of the workqueuing execution model for Intel SMP architectures
-
E. Su, X. Tian, M. Girkar, G. Haab, S. Shah, and P. Petersen. Compiler support of the workqueuing execution model for Intel SMP architectures. In Fourth European Workshop on OpenMP, 2002.
-
(2002)
Fourth European Workshop on OpenMP
-
-
Su, E.1
Tian, X.2
Girkar, M.3
Haab, G.4
Shah, S.5
Petersen, P.6
-
35
-
-
34250086660
-
Workcrews: An abstraction for controlling parallelism
-
M. T. Vandevoorde and E. S. Roberts. Workcrews: an abstraction for controlling parallelism. Int. J. Parallel Program., 17(4):347-366, 1988.
-
(1988)
Int. J. Parallel Program
, vol.17
, Issue.4
, pp. 347-366
-
-
Vandevoorde, M.T.1
Roberts, E.S.2
-
36
-
-
0029179077
-
The splash-2 programs: Characterization and methodological considerations
-
S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta. The splash-2 programs: characterization and methodological considerations. In Proceedings of the International Symposium on Computer architecture, 1995.
-
(1995)
Proceedings of the International Symposium on Computer architecture
-
-
Woo, S.C.1
Ohara, M.2
Torrie, E.3
Singh, J.P.4
Gupta, A.5
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