Puzzle tool: An example of programming computation and deduction

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2410, Issue , 2002, Pages 214-229

  Gordon, Michael J C ^a  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTATIONAL EFFICIENCY;

BOOLEAN FORMULAE; PROGRAMMING TOOLS;

THEOREM PROVING;

EID: 35248899684     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-45685-6_15     Document Type: Conference Paper

References (15)

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2. Bruno Barras. Programming and computing in HOL. In J. Harrison and M. Aagaard, editors, Theorem Proving in Higher Order Logics: 13th International Conference, TPHOLs 2000, volume 1869 of Lecture Notes in Computer Science, pages 17-37. Springer-Verlag, 2000.
3. See web page http://www-cad.eecs.berkeley.edu/~kenmcmil/smv\/.
4. L. A. Dennis, G. Collins, M. Norrish, R. Boulton, K. Slind, G. Robinson, M. Gordon, and T. Melham. The prosper toolkit. In S. Graf and M. Schwartbach, editors, Tools and Algorithms for Constructing Systems (TACAS 2000), number 1785 in Lecture Notes in Computer Science, pages 78-92. Springer-Verlag, 2000.
5. Michael J.C. Gordon. Reachability programming in HOL using BDDs. In J. Harrison and M. Aagaard, editors, Theorem Proving in Higher Order Logics: 13th International Conference, TPHOLs 2000, volume 1869 of Lecture Notes in Computer Science, pages 180-197. Springer-Verlag, 2000.
6. Mike Gordon. Reachability programming in HOL98 using BDDs. In The 13th International Conference on Theorem Proving and Higher Order Logics. Springer-Verlag, 2000.
7. John Harrison. Binary decision diagrams as a HOL derived rule. The Computer Journal, 38:162-170, 1995.
8. J. Joyce and C. Seger. The HOL-Voss System: Model-Checking inside a General-Purpose Theorem-Prover. In J. J. Joyce and C.-J. H. Seger, editors, Higher Order Logic Theorem Proving and its Applications: 6th International Workshop, HUG'93, Vancouver, B.C., August 11-13 1993, volume 780 of Lecture Notes in Computer Science, pages 185-198. Spinger-Verlag, 1994.
9. Moscow ML interface to BuDDy by Ken Friis Larsen and Jakob Lichtenberg documented at http://www.it-c.dk/research/muddy/.
10. K.L. McMillan. A compositional rule for hardware design refinement. In Orna Grumberg, editor, Computer-Aided Verification, CAV '97, Lecture Notes in Computer Science, pages 24-35, Haifa, Israel, June 1997. Springer-Verlag.
11. John O'Leary, Xudong Zhao, Robert Gerth, and Carl-Johan H. Seger. Formally verifying IEEE compliance of floating-point hardware. Intel Technology Journal, First Quarter 1999. Online at http://developer.intel.com/technology/itj/.
12. See web page http://www.csl.sri.com/pvs.html.
13. S. Rajan, N. Shankar, and M.K. Srivas. An integration of model-checking with automated proof checking. In Pierre Wolper, editor, Computer-Aided Verification, CAV'95, volume 939 of Lecture Notes in Computer Science, pages 84-97, Liege, Belgium, June 1995. Springer-Verlag.
14. Carl-Johan H. Seger. Voss - a formal hardware verification system: User's guide. Technical Report UBC TR 93-45, The University of British Columbia, December 1993.
15. Fabio Somenzi's CUDD: CU Decision Diagram Package documented at http://vlsi.colorado.edu/~fabio/CUDD/.