Fast DES implementations for FPGAs and its application to a universal key-search machine

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1556, Issue , 1999, Pages 234-247

  Kaps, Jens Peter ^a   Paar, Christof ^a  

^a Worcester Polytechnic Institute   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NETWORK SECURITY;

CRYPTOGRAPHIC ALGORITHMS; DATA ENCRYPTION STANDARD; ENCRYPTION ALGORITHMS; HIGH-SPEED PERFORMANCE; ITS APPLICATIONS; SECURITY APPLICATION; SECURITY PROTOCOLS; SOFTWARE IMPLEMENTATION;

CRYPTOGRAPHY;

EID: 35248888433     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48892-8_19     Document Type: Conference Paper

References (13)

1. M. Blaze, W. Diffie, R.L. Rivest, B. Schneier, T. Shimomura, E. Thompson, and M. Wiener. Minimal key lengths for symmetric ciphers to provide adequate commercial security. January 1996.
2. W. Diffie and M.E. Hellman. Exhaustive cryptanalysis of the NBS Data Encryption Standard. Computer, 10:74-84, June 1977.
3. H. Eberle. A high-speed DES implementation for network applications. In E.F. Brickell, editor, Advances in Cryptology - CRYPTO '92. 12th Anual International Cryptology Conference Proceedings, Lecture Notes in Computer Science, pages 521-539., Berlin, Germany, 1993. Springer-Verlag.
4. H. Eberle and C.P. Thacker. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 19.7/1-4, New York, NY, USA, 1992. IEEE, IEEE.
5. G.M. Haskins. Securing Asynchronous Tranfer Mode networks. Masters thesis, Worcester Polytechnic Institute, Worcester, Massachusetts, USA, May 1997.
6. F. Hendessi and M. Aref. A successful attack against the DES. In T.A. Gulliver and N.P. Secord, editors, Information Theory and Applications: Proceedings Third Canadian Workshop, volume 793 of Lecture Notes in Computer Science, pages 78-90, Berlin, 1994. Springer Verlag.
7. Jens-Peter Kaps. High speed FPGA architectures for the Data Encryption Standard. Masters thesis, Worcester Polytechnic Institute, Worcester, Massachusetts, USA, May 1998.
8. J. Leonard and W.H. Magione-Smith. A case study of partially evaluated hardware circuits: Keyspecific DES. In W. Luk, P.Y.K. Cheung, and M. Glesner, editors, Field-programmable Logic and Applications. 7th International Workshop, FPL '97, Berlin, Germany, 1997. Springer-Verlag.
9. A.J. Menezes, S.A. Vanstone, and P.C. Van Oorschot. Handbook of Applied Cryptography. Discrete Mathematics and its Application. CRC Press, Florida, USA, 1997.
10. National Bureau of Standards FIPS Publication 46. DES modes of operation, 1977.
11. B. Schneier. Applied Cryptography Second Edition: protocols, algorithms, and source code in C. Wiley & Sons, New York, USA, 2nd edition, 1996.
12. D.R. Stinson. Cryptography: Theory and Practice. Discrete Mathematics and its Applications. CRC Press, Florida, USA, 1995.
13. M.J. Wiener. Efficient DES key search. Crypto '93 Rump Session Presentation, August 1993.