The physical limit and manufacturability of power diode with carrier lifetime control

ICIEA 2007: 2007 Second IEEE Conference on Industrial Electronics and Applications

Volumn , Issue , 2007, Pages 46-51

  Cher, Ming Tan ^a,b   Lina, Sun ^b   Raghavan, Nagarajan ^a,b   Guangyu, Huang ^b   Chuck, Hsu ^c   Chase, Wang ^c  

^a IEEE   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^c Sino American Silicon Productions Inc   (Taiwan)

Author keywords

Carrier lifetime control; Design of experiment; Power diode; Response surface method; Simulated annealing

Indexed keywords

CARRIER LIFETIME CONTROL; POWER DIODE; RESPONSE SURFACE METHOD;

CARRIER LIFETIME; COMPUTER SIMULATION; DESIGN OF EXPERIMENTS; ELECTRIC LOSSES; SEMICONDUCTOR DOPING;

DIODES;

EID: 35248883080     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIEA.2007.4318367     Document Type: Conference Paper

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