Reasoning with temporal logic on truncated paths

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2725, Issue , 2003, Pages 27-39

  Eisner, Cindy ^a   Fisman, Dana ^a,b   Havlicek, John ^c   Lustig, Yoad ^a   McIsaac, Anthony ^d   Van Campenhout, David ^e  

^a IBM HAIFA RESEARCH LAB   (Israel)

^b WEIZMANN INSTITUTE OF SCIENCE   (Israel)

^c MOTOROLA INC   (United States)

^d STMICROELECTRONICS   (Italy)

^e Verisity Design

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; MODEL CHECKING; RECONFIGURABLE HARDWARE; TEMPORAL LOGIC;

BOUNDED MODEL CHECKING; LINEAR TEMPORAL LOGIC; VERIFICATION METHOD;

COMPUTER CIRCUITS;

EID: 35248878834     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-45069-6_3     Document Type: Article

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