Efficient reconfigurable logic circuits for matching complex network intrusion detection patterns

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2778, Issue , 2003, Pages 956-959

  Clark, Christopher R ^a   Schimmel, David E ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEX NETWORKS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTRUSION DETECTION; MERCURY (METAL); NETWORKS (CIRCUITS); PATTERN MATCHING; PATTERN RECOGNITION;

CLOCK SPEED; CO-PROCESSORS; IN NETWORKS; NETWORK INTRUSION DETECTION; RECONFIGURABLE LOGIC; REGULAR EXPRESSIONS; RULE DATABASE;

LOGIC CIRCUITS;

EID: 35248874856     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-45234-8_94     Document Type: Article

References (8)

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8. P. Bellows and B.L. Hutchings, "JHDL - An HDL for Reconfigurable Systems," Proceedings of IEEE FCCM 1998, pp. 175-184, Apr. 1998.