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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 168-178

Run-time-conscious automatic timing-driven FPGA layout synthesis

(6) Anderson, Jason a Nag, Sudip a,b Chaudhary, Kamal a Kalman, Sandor a Madabhushi, Chari a Cheng, Paul a

a XILINX INC (United States)

b Flexlogics ^*

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN;

AUTOMATIC TIMING; CONSTRAINT GENERATION; CONSTRAINT SPECIFICATIONS; DESIGN PERFORMANCE; LAYOUT SOLUTIONS; LAYOUT SYNTHESIS; PERFORMANCE CONSTRAINTS; PRACTICAL METHOD;

INTEGRATED CIRCUIT LAYOUT;

EID: 35048901450 PISSN: 03029743 EISSN: 16113349 Source Type: Book Series
DOI: 10.1007/978-3-540-30117-2_19 Document Type: Article

Times cited : (7)

References (11)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.