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Volumn 3296, Issue , 2004, Pages 133-143

Effect of optimizations on performance of openMP programs

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMMING INTERFACES (API); C++ (PROGRAMMING LANGUAGE);

EID: 35048892897     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30474-6_19     Document Type: Article
Times cited : (4)

References (12)
  • 1
    • 4644226743 scopus 로고    scopus 로고
    • Simultaneous Multi-threading Implementation in POWERS - IBM's Next Generation POWER Micorprocessor
    • August
    • Ron Kalla, Balaram Sinharoy, Joel Tendler, Simultaneous Multi-threading Implementation in POWERS - IBM's Next Generation POWER Micorprocessor, Hot Chips Conference 15, August, 2003, http://www.hotchips.org/archive/hc15/pdf/11.ibm. pdf.
    • (2003) Hot Chips Conference , vol.15
    • Kalla, R.1    Sinharoy, B.2    Tendler, J.3
  • 2
    • 35248821174 scopus 로고    scopus 로고
    • A Practical OpenMP Compiler for System on Chips
    • WOMPAT Toronto, Canada, June 26-27, 2003. LNCS 2716
    • Feng Liu, Vipin Chaudhary, A Practical OpenMP Compiler for System on Chips, in proc. of International Workshop on OpenMP Applications and Tools, WOMPAT 2003, Toronto, Canada, June 26-27, 2003. LNCS 2716, pp.54-68.
    • (2003) Proc. of International Workshop on OpenMP Applications and Tools , pp. 54-68
    • Liu, F.1    Chaudhary, V.2
  • 5
    • 1942448564 scopus 로고    scopus 로고
    • Intel OpenMP C++/Fortran Compiler for Hyper-Threading Technology:Implementation and Performance
    • Q1 issue
    • Xinmin Tian, Aart Bik, Milind Girkar, Paul Grey, Hideki Saito, Emesto Su, Intel OpenMP C++/Fortran Compiler for Hyper-Threading Technology:Implementation and Performance, Intel Technology Journal, http://www.intel.com/technology/itj, V6, Q1 issue, 2002.
    • (2002) Intel Technology Journal
    • Tian, X.1    Bik, A.2    Girkar, M.3    Grey, P.4    Saito, H.5    Su, E.6
  • 8
    • 0344908850 scopus 로고    scopus 로고
    • Automatic Intra-Register Vectorization for the Intel® Architecture
    • April
    • Aart Bik, Milind Girkar, Paul Grey, and Xinmin Tian, Automatic Intra-Register Vectorization for the Intel® Architecture, International Journal of Parallel Programming, Volume 30, page.65-98, April 2002.
    • (2002) International Journal of Parallel Programming , vol.30 , pp. 65-98
    • Bik, A.1    Girkar, M.2    Grey, P.3    Tian, X.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.