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Volumn 3038, Issue , 2004, Pages 1289-1296

Evolutionary state assignment for synchronous finite state machines

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; HARDWARE; OPTIMIZATION; RECONFIGURABLE HARDWARE; STATE ASSIGNMENT;

EID: 35048858338     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-24688-6_166     Document Type: Article
Times cited : (2)

References (8)
  • 1
    • 0342891397 scopus 로고
    • Fundamentals of digital systems design
    • Prentice-Hall
    • V.T. Rhyne, Fundamentals of digital systems design, Prentice-Hall, Electrical Engineering Series. 1973.
    • (1973) Electrical Engineering Series
    • Rhyne, V.T.1
  • 3
    • 0025489532 scopus 로고
    • Nova: State assignment of finite state machine for optimal two-level logic implementation
    • September
    • T. Villa and A. Sangiovanni-Vincentelli, Nova: state assignment of finite state machine for optimal two-level logic implementation, IEEE Transactions on Computer-Aided Design, vol. 9, pp. 905-924, September 1990.
    • (1990) IEEE Transactions on Computer-aided Design , vol.9 , pp. 905-924
    • Villa, T.1    Sangiovanni-Vincentelli, A.2
  • 6
    • 0011808050 scopus 로고
    • A programmed algorithm for assigning internal codes to sequential machines
    • August
    • D.B. Armstrong, A programmed algorithm for assigning internal codes to sequential machines, IRE Transactions on Electronic Computers, EC 11, no. 4, pp. 466-472, August 1962.
    • (1962) IRE Transactions on Electronic Computers , vol.EC 11 , Issue.4 , pp. 466-472
    • Armstrong, D.B.1
  • 8
    • 85087224916 scopus 로고    scopus 로고
    • th
    • th, 2003.
    • (2003)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.