-
2
-
-
84943615552
-
An Implementation of des and AES, Secure against Some Attacks
-
Springer-Verlag, May 14-16
-
M.-L. Akkar and C. Giraud. An Implementation of DES and AES, Secure against Some Attacks. In Workshop on Cryptographic Hardware and Embedded Systems - CHES 2001, volume LNCS 2162, pages 309-318. Springer-Verlag, May 14-16, 2001.
-
(2001)
Workshop on Cryptographic Hardware and Embedded Systems - CHES 2001
, vol.2162
, pp. 309-318
-
-
Akkar, M.-L.1
Giraud, C.2
-
4
-
-
84957079591
-
Towards Sound Approaches to Counteract Power-Analysis Attacks
-
Springer-Verlag, August
-
S. Chari, C. S. Jutla, J. R. Rao, and P. Rohatgi. Towards Sound Approaches to Counteract Power-Analysis Attacks. In Advances in Cryptology - CRYPTO '99, volume LNCS 1666, pages 398-412. Springer-Verlag, August 1999.
-
(1999)
Advances in Cryptology - CRYPTO '99
, vol.1666
, pp. 398-412
-
-
Chari, S.1
Jutla, C.S.2
Rao, J.R.3
Rohatgi, P.4
-
5
-
-
68549099548
-
Differential Power Analysis in the Presence of Hardware Countermeasures
-
Springer-Verlag, August 17-18
-
C. Clavier, J.S. Coron, and N. Dabbous. Differential Power Analysis in the Presence of Hardware Countermeasures. In Workshop on Cryptographic Hardware and Embedded Systems - CHES 2000, volume LNCS 1965, pages 252-263. Springer-Verlag, August 17-18, 2000.
-
(2000)
Workshop on Cryptographic Hardware and Embedded Systems - CHES 2000
, vol.1965
, pp. 252-263
-
-
Clavier, C.1
Coron, J.S.2
Dabbous, N.3
-
6
-
-
0004777155
-
Resistance Against Implementation Attacks: A Comparative Study of the AES Proposals
-
Rome, Italy, March
-
J. Daemen and V. Rijmen. Resistance Against Implementation Attacks: A Comparative Study of the AES Proposals. In Proceedings of the Second AES Candidate Conference (AES2), Rome, Italy, March 1999.
-
(1999)
Proceedings of the Second AES Candidate Conference (AES2)
-
-
Daemen, J.1
Rijmen, V.2
-
7
-
-
0000895310
-
m) Yielding Small Complexity Arithmetic Circuits
-
September
-
m) Yielding Small Complexity Arithmetic Circuits. IEEE Transactions on Computers, 47(9):938-946, September 1998.
-
(1998)
IEEE Transactions on Computers
, vol.47
, Issue.9
, pp. 938-946
-
-
Drolet, G.1
-
8
-
-
35248826454
-
Security Evaluation of Asynchronous Circuits
-
Springer-Verlag, September 7-10
-
J.J.A. Fournier, S. Moore, H. Li, R. Mullins, and G. Taylor. Security Evaluation of Asynchronous Circuits. In Workshop on Cryptographic Hardware and Embedded Systems - CHES 2003, volume LNCS 2779, pages 125-136. Springer-Verlag, September 7-10, 2003.
-
(2003)
Workshop on Cryptographic Hardware and Embedded Systems - CHES 2003
, vol.2779
, pp. 125-136
-
-
Fournier, J.J.A.1
Moore, S.2
Li, H.3
Mullins, R.4
Taylor, G.5
-
10
-
-
21144451450
-
A New Paradigm for Key-Dependent Reversible Circuits
-
Springer Verlag
-
Jovan Dj. Golić. DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits. In Cryptographic Hardware and Embedded Systems - CHES 2003, volume LNCS 2779, pages 98-112. Springer Verlag, 2003.
-
(2003)
Cryptographic Hardware and Embedded Systems - CHES 2003
, vol.2779
, pp. 98-112
-
-
Dj, J.1
Dekart, G.2
-
12
-
-
31244434390
-
Itoh-Tsujii Inversion in Standard Basis and Its Application in Cryptography and Codes
-
February
-
J. Guajardo and C. Paar. Itoh-Tsujii Inversion in Standard Basis and Its Application in Cryptography and Codes. Design, Codes, and Cryptography, 25(2):207-216, February 2002.
-
(2002)
Design, Codes, and Cryptography
, vol.25
, Issue.2
, pp. 207-216
-
-
Guajardo, J.1
Paar, C.2
-
14
-
-
0003989443
-
Introduction to Differential Power Analysis and Related Attacks
-
Cryptography Research, Inc.
-
P. Kocher, J. Jaffe, and B. Jun. Introduction to Differential Power Analysis and Related Attacks. Technical Report, Cryptography Research, Inc., 1998.
-
(1998)
Technical Report
-
-
Kocher, P.1
Jaffe, J.2
Jun, B.3
-
15
-
-
84939573910
-
Differential Power Analysis
-
Springer-Verlag
-
P. Kocher, J. Jaffe, and B. Jun. Differential Power Analysis. In Advances in Cryptology - CRYPTO '99, volume LNCS 1666, pages 388-397. Springer-Verlag, 1999.
-
(1999)
Advances in Cryptology - CRYPTO '99
, vol.1666
, pp. 388-397
-
-
Kocher, P.1
Jaffe, J.2
Jun, B.3
-
16
-
-
84943632039
-
Timing attacks on implementations of Diffie-Hellman, RSA, DSS and other systems
-
Springer Verlag
-
Paul C. Kocher. Timing attacks on implementations of Diffie-Hellman, RSA, DSS and other systems. In Advances in Cryptology - Proceedings of CRYPTO 1996, volume LNCS 1109, pages 104-113. Springer Verlag, 1996.
-
(1996)
Advances in Cryptology - Proceedings of CRYPTO 1996
, vol.1109
, pp. 104-113
-
-
Kocher, P.C.1
-
17
-
-
24144497857
-
A timing attack against Rijndael
-
Université Catholique de Louvain
-
Francois Koeune and Jean-Jacques Quisquater. A timing attack against Rijndael. Technical Report CG-1999/1, Université Catholique de Louvain, 1999.
-
(1999)
Technical Report CG-1999/1
-
-
Koeune, F.1
Quisquater, J.-J.2
-
19
-
-
84974679353
-
Securing the AES Finalists Against Power Analysis Attacks
-
B. Schneier, editor, Springer-Verlag
-
T.S. Messerges. Securing the AES Finalists Against Power Analysis Attacks. In B. Schneier, editor, 7th International Workshop on Fast Software Encryption - FSE 2000, volume LNCS 1978, pages 150-164. Springer-Verlag, 2001.
-
(2001)
7th International Workshop on Fast Software Encryption - FSE 2000
, vol.1978
, pp. 150-164
-
-
Messerges, T.S.1
-
20
-
-
0041325255
-
Balanced Self-Checking Asynchronous Logic for Smart Card Applications
-
S. Moore, R. Anderson, R. Mullins, G. Taylor, and J.J.A. Fournier. Balanced Self-Checking Asynchronous Logic for Smart Card Applications. Journal of Microprocessors and Microsystems, 27(9):421-430, 2003.
-
(2003)
Journal of Microprocessors and Microsystems
, vol.27
, Issue.9
, pp. 421-430
-
-
Moore, S.1
Anderson, R.2
Mullins, R.3
Taylor, G.4
Fournier, J.J.A.5
-
22
-
-
84946832086
-
A Compact Rijndael Hardware Architecture with S-Box Optimization
-
Springer-Verlag
-
A. Satoh, S. Morioka, K. Takano, and S. Munetoh. A Compact Rijndael Hardware Architecture with S-Box Optimization. In Advances in Cryptology - ASIACRYPT 2001, volume LNCS 2248, pages 239-254. Springer-Verlag, 2001.
-
(2001)
Advances in Cryptology - ASIACRYPT 2001
, vol.2248
, pp. 239-254
-
-
Satoh, A.1
Morioka, S.2
Takano, K.3
Munetoh, S.4
-
23
-
-
84893732023
-
A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards
-
K. Tiri, M. Akmal, and I. Verbauwhede. A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards. In 28th European Solid-State Circuits Conference (ESSCIRC 2002), 2002.
-
(2002)
28th European Solid-State Circuits Conference (ESSCIRC 2002)
-
-
Tiri, K.1
Akmal, M.2
Verbauwhede, I.3
-
24
-
-
35248825993
-
Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology
-
C.D. Walter, Ç. K. Koç, and C. Paar, editors, Springer-Verlag
-
K. Tiri and I. Verbauwhede. Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. In C.D. Walter, Ç. K. Koç, and C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems - CHES 2003, volume LNCS 2779, pages 125-136. Springer-Verlag, 2003.
-
(2003)
Workshop on Cryptographic Hardware and Embedded Systems - CHES 2003
, vol.2779
, pp. 125-136
-
-
Tiri, K.1
Verbauwhede, I.2
-
25
-
-
24144437895
-
Combinational logic design for aes subbyte transformation on masked data
-
IACR, November 11
-
E. Trichina. Combinational logic design for aes subbyte transformation on masked data. Cryptology eprint archive: Report 2003/236, IACR, November 11, 2003.
-
(2003)
Cryptology Eprint Archive: Report 2003/236
-
-
Trichina, E.1
-
26
-
-
35248890508
-
Simplified Adaptive Multiplicative Masking for AES
-
Springer-Verlag
-
E. Trichina, D. De Seta, and L. Germani. Simplified Adaptive Multiplicative Masking for AES. In Workshop on Cryptographic Hardware and Embedded Systems - CHES 2002, volume LNCS 2523, pages 187-197. Springer-Verlag, 2002.
-
(2002)
Workshop on Cryptographic Hardware and Embedded Systems - CHES 2002
, vol.2523
, pp. 187-197
-
-
Trichina, E.1
De Seta, D.2
Germani, L.3
-
28
-
-
35048873536
-
-
HTWK Leipzig, Germany, May 2
-
P. Voigtländer. Entwicklung einer Hardwarearchitektur für einen AES-Coprozessor. Diplomarbeit, Fachbereich Informatik, Mathematik und Naturwissenshaften, Technische Informatik, HTWK Leipzig, Germany, May 2, 2003.
-
(2003)
Entwicklung Einer Hardwarearchitektur für Einen AES-Coprozessor. Diplomarbeit, Fachbereich Informatik, Mathematik und Naturwissenshaften, Technische Informatik
-
-
Voigtländer, P.1
|