FPGA implementation of feature extraction and neural network classifier for handwritten digit recognition

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3173, Issue , 2004, Pages 988-995

  Shen, Dongsheng ^a   Jin, Lianwen ^a   Ma, Xiaobin ^a  

^a SOUTH CHINA UNIVERSITY OF TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; BACKPROPAGATION; BACKPROPAGATION ALGORITHMS; CHARACTER RECOGNITION; CLASSIFICATION (OF INFORMATION); COMPUTER SOFTWARE PORTABILITY; EXTRACTION; FEATURE EXTRACTION; RECONFIGURABLE HARDWARE;

DIRECTIONAL FEATURE; FPGA IMPLEMENTATIONS; HANDWRITTEN DIGIT; HANDWRITTEN DIGIT RECOGNITION; NETWORK COMPUTING; NEURAL NETWORK CLASSIFIER; OFF-LINE HANDWRITTEN; PIPELINE TECHNOLOGY;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 35048840663     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-28647-9_163     Document Type: Article

References (12)

1. Athanas, P., Abbott, L., Cherbaka, M., Pudipeddi, B., Paar, K.: A Custom Computing Solution to Automated Visual Inspection of Silicon Wafers. Southeastcon '97, 'Engineering new New Century', Proceedings, IEEE (1997) 315-319
2. Jean, J., Liang, X., Drozd, B., Tomko, K.: Accelerating an IR Automatic Target Recognition Application with FPGAs. Field-Programmable Custom Computing Machines, FCCM '99 Proceedings, Seventh Annual IEEE Symposium on (1999) 290 -291
3. Miteran, J., Bailly, R., Gorria, P.: Real Time Image Segmentation Using FPGA and Parallel Processor. TENCON '96, Proceedings, 1996 IEEE TENCON. Digital Signal Processing Applications, Vol. 1 (1996) 233-236
4. Jin, L., Xu, B.: Directional Cellular Feature Extraction with Elastic Meshing for Handwritten Chinese Character Recognition. Journal of Circuits and Systems, Vol. 2 (1997) 7-12
5. Luo, X., Dong, S., Jin, L., Xu, H.: An Integrated Neural Network Based Classifier for Handwritten Digit Recognition. Computer Engineering, Vol. 28 No.8 (2002) 69-71
6. Gao, Y., Zhang, L., Wu, G.: An Algorithm for Threshold Based on Arithmetic Mean of Gray. Journal of Image and Graphics Value, Vol. 4 (1999) 524-528
7. Ma, X., Jin, L., Shen, D., Yin, J.: A Mixed Parallel Neural Network Computing Unit Implementation in FPGA. IEEE Int. Conf. Neural Networks & Signal Processing, Nanjing, China (2003)
8. Wang, Y., Zhang, Z.: VHDL Programming and Simulation. Posts & Telecom Press (2000)
9. Piche, S.W.: The Selection of Weight Accuracies for Madalines Neural Networks. IEEE Transactions on ,Vol. 6, Issue 2 (1995) 432- 445
10. Wang, C, Xue, X., Zhong, X.: The Way of Using FPGA/CPLD Design Tool Xilinx ISE 5.X. Posts & Telecom Press (2003) 85-160
11. Wang, J., Yang, J.: Digial System Design and Verflog HDL. 1st edition. Publishing House of Electronics Industry, Beijing (2002) 51-62
12. Chen, X., Teng, L.: Starting VHDL and Its Application. Posts & Telecom Press (2000) 165-192