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Volumn 3141, Issue , 2004, Pages 233-243
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A hardware implementation of a network of functional spiking neurons with hebbian learning
a
EPFL
(Switzerland)
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Author keywords
[No Author keywords available]
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Indexed keywords
DISCRIMINATORS;
EMBEDDED SYSTEMS;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
HARDWARE;
NEURONS;
REAL TIME SYSTEMS;
RECONFIGURABLE HARDWARE;
COMPUTING CAPABILITY;
FREQUENCY DISCRIMINATORS;
HARDWARE IMPLEMENTATIONS;
HARDWARE SOLUTIONS;
IMPLEMENTATION COST;
INHERENT PARALLELISM;
REAL TIME EXECUTION;
SOFTWARE SOLUTION;
NEURAL NETWORKS;
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EID: 35048831467
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/978-3-540-27835-1_18 Document Type: Article |
Times cited : (5)
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References (11)
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