A bondpad-size narrowband LNA for digital CMOS

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2007, Pages 677-680

  Borremans, J ^a,b   Wambacq, P ^a,b   Van Der Plas, G ^b   Rolain, Y ^a   Kuijk, M ^a  

^a VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

^b IMEC   (Belgium)

Author keywords

CMOS; Low area; Low noise amplifier (LNA); Narrowband; Shunt shunt feedback; Stacked inductor

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; RADIO SYSTEMS;

SHUNT-SHUNT FEEDBACK; STACKED INDUCTOR;

LOW NOISE AMPLIFIERS;

EID: 34748901150     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2007.380973     Document Type: Conference Paper

References (5)

1. J. Borremans, P. Wambacq, D. Linten, "An ESD protected DC-6GHz low-area, low-power LNA in 90nm digital CMOS", Accepted for ISSCC 2007.
2. J.-H. C. Zhan, S. S. Taylor, "5 GHz resistive-feedback CMOS LNA for low-cost multi-standard applications", ISSCC Dig. of Technical Papers, February 2006, pp. 721730.
3. J. Borremans, L. De Locht, P.Wambacq, Y. Rolain, "Nonlinearity Analysis of Analog/RF Circuits Using Combined Multisine and Volterra Analysis", Accepted for DATE Conference, 2007.
4. P. Gray, G. Meyer, "Analysis and Design of Analog Integrated Circuits", Wiley, 4th Edition, February 2001.
5. F. Bruccoleri, E. A. M. Klumperink, B. Nauta, "Wide-band CMOS low-noise amplifier exploiting thermal noise canceling", IEEE JSSC, Vol. 39, No. 2, pp. 275-282, February 2004.