Hardware architecture for matrix factorization in mimo receivers

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 196-199

  Cerato, Barbara ^a   Masera, Guido ^a   Nilsson, Peter ^b  

^a POLITECNICO DI TORINO   (Italy)

^b LUND UNIVERSITY   (Sweden)

Author keywords

MIMO systems; QR decomposition; Space time codes

Indexed keywords

CHANNEL CODING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; SPACE TIME ADAPTIVE PROCESSING; THROUGHPUT; WIRELESS LOCAL AREA NETWORKS (WLAN);

MIMO RECEIVERS; QR DECOMPOSITION; SPACE TIME CODES;

SIGNAL RECEIVERS;

EID: 34748888581     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228835     Document Type: Conference Paper

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