A power efficient and fast transient response low drop-out regulator in standard CMOS process

2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers

Volumn , Issue , 2007, Pages 215-218

  Lin, Chung Wei ^a   Liu, Yen Jen ^a  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOADS; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; RESPONSE TIME (COMPUTER SYSTEMS); TRANSIENT ANALYSIS;

FAST TRANSIENT RESPONSE; LOAD TRANSIENT TESTING; LOW DROP OUT REGULATOR (LDO); OUTPUT VOLTAGE;

ELECTRIC CURRENT REGULATORS;

EID: 34748874677     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VDAT.2006.258163     Document Type: Conference Paper

References (3)

1. Chaitanya K. Chava and Jose Silva-Martinez, "A Frequency Compensation Scheme for LDO Voltage Regulators", IEEE Transactions on Circuit and Systems-I: Regular Papers, VOL. 51, No. 6, pp. 1041-1050, June 2004.
2. Gabriel A. Rincon-Mora and Phillip E. Allen, "A Low-Voltage, Low Quiescent Current, Low Drop-Out Regulator", IEEE Journal of Solid-State Circuits, VOL. 33, No. 1, pp. 36-44, Jan. 1998.
3. Khoman Phang, "CMOS. Optical Preamplifier Design Using Graphical Circuit Analysis", P.H.D. Thesis, University of Toronto in Canada, pp. 74-107, 2001