Improvements for constraint solving in the systemc verification library

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 493-496

  Groe, Daniel ^a   Ebendt, Rüdiger ^b   Drechsler, Rolf ^a  

^a UNIVERSITY OF BREMEN   (Germany)

^b GERMAN AEROSPACE CENTER DLR   (Germany)

Author keywords

Constraint based randomization; SystemC; SystemC verification library

Indexed keywords

CONSTRAINT THEORY; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; PROBLEM SOLVING; VERIFICATION;

CONSTRAINT BASED RANDOMIZATION; SYSTEM DESCRIPTION LANGUAGES; SYSTEMC VERIFICATION LIBRARY;

CHIP SCALE PACKAGES;

EID: 34748866253     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228901     Document Type: Conference Paper

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