A 3.2Gb/s semi-blind-oversampling CDR

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Van Ierssel, Marcus ^a   Sheikholeslami, Ali ^a   Tamura, Hirotaka ^b   Walker, William W ^c  

^a UNIVERSITY OF TORONTO   (Canada)

^b FUJITSU LABORATORIES LTD   (Japan)

^c FUJITSU LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CDR; JITTER TOLERANCE;

CMOS INTEGRATED CIRCUITS; ELECTRIC FREQUENCY CONTROL; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUIT TESTING; JITTER;

TIMING CIRCUITS;

EID: 34748852673     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)