GALS SoC interconnect bus for wireless sensor network processor platforms

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 132-137

  Fernández, Carlos ^a   Raval, Rajkumar K ^a   Bleakley, Chris J ^a  

^a UNIVERSITY COLLEGE DUBLIN   (Ireland)

Author keywords

Application specific bus; GALS; Low power; SoC bus; System on chip bus; Wireless sensor network; WSN

Indexed keywords

BUSBARS; CHIP SCALE PACKAGES; CLIENT SERVER COMPUTER SYSTEMS; ELECTRIC POWER UTILIZATION; WIRELESS SENSOR NETWORKS;

APPLICATION SPECIFIC BUS; CLOCK GATING; DYNAMIC VOLTAGE AND FREQUENCY SCALED (DVFS) SUB-SYSTEMS; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS (GALS) SYSTEMS; SYSTEM ON CHIP BUS;

INTERCONNECTION NETWORKS;

EID: 34748822247     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228819     Document Type: Conference Paper

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