A polar loop transmitter with digital interface including a loop-bandwidth calibration system

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 348-350

  Akamlne, Yuklnori ^a   Tanaka, Satoshi ^a   Kawabe, Manabu ^a   Okazaki, Takao ^a   Shima, Yasuo ^a   Yamamoto, Masahlko ^a   Takano, Ryoichi ^b   Kimura, Yasuyuki ^b  

^a HITACHI LTD   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; INTERFACES (COMPUTER); SIGNAL RECEIVERS;

CALIBRATION SYSTEM; POLAR LOOP TRANSMITTER; RFIC; TIMING-CONTROL CIRCUIT;

TRANSMITTERS;

EID: 34548863329     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373437     Document Type: Conference Paper

References (3)

1. Pierro-Henri Bonnaud, Markus Hammes, Andre Hanko, et al., "A Fully Integrated SoC for GSM/GPRS in O.13μm CMOS," ISSCC Dig. Tech. Papers, pp. 482-483, Feb., 2006.
2. V. PETROVIC and W. Gosling "Polar-loop transmitter," IEEE Electronics Letters, Vol. 15, No. 10, pp. 286-289, May, 1979.
3. 3GPP TS 05.05 V8.9.0, "Digital Cellular Telecommunications System (Phase 2+); Radio Transmission and Reception."