A 58-to-60.4GHz frequency synthesizer in 90nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 196-198

  Lee, Chihun ^a   Liu, Shen Luan ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; CMOS INTEGRATED CIRCUITS; DISTRIBUTED POWER GENERATION; FREQUENCY DIVIDING CIRCUITS; MICROPROCESSOR CHIPS; PHASE NOISE;

CHIP POWER CONSUMPTION; CURRENT-REUSE FREQUENCY DIVIDERS; SYNTHESIZER IMPLEMENTATION;

FREQUENCY SYNTHESIZERS;

EID: 34548853685     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373361     Document Type: Conference Paper

References (6)

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2. C. Lee, L.C. Cho, and S.I. Liu, "A 1.2V 37-38.5GHz 8-Phase Clock Generator in 0.13μm CMOS Technology," Symp. VLSI Circuits Dig. Tech. Papers, pp. 34-35, June, 2006.
3. C Lee, L.C. Cho, and S.I. Liu, "A 44GHz Dual-Modulus Divide-by-4/5 Prescaler in 90nm CMOS Technology," Proc. IEEE CICC, pp. 397-400, Sept., 2006.
4. R.C.H. van de Beek, C.S. Vaucher, D.M.W. Leenaerts, et al.,"A 2.5 to 10GHz Clock Multiplier Unit with 0.22ps rms Jitter in a 0.18μm CMOS Technology," ISSCC Dig. Tech. Papers, pp. 178-179, Feb., 2003.
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