Gate control strategies for high efficiency charge pumps

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 1907-1910

  Feng, Su ^a   Wing Hung, Ki ^a   Chi Ying, Tsui ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP; GATE CONTROL; HIGH EFFICIENCY; MOS TRANSISTORS; OPTIMIZED TOPOLOGY; SIMULATION AND MEASUREMENT;

CHARGE TRANSFER; ION EXCHANGE; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

PUMPS;

EID: 34548836463     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1464985     Document Type: Conference Paper

References (5)

1. J.F. Dickson, "On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique," IEEE J. of Solid-State Ckts., pp.374-378, June 1976.
2. J.T. Wu and K.L. Chang, "MOS charge pumps for low-voltage operation," IEEE J. of Solid-State Ckts., pp.592-597, April 1998.
3. K.H. Cheng, C.Y. Chang and C.H. Wei, "A CMOS charge pump for sub-2.0V operation," IEEE Int'l Symp. on Ckts. & Sys., pp.V-89 - V- 92, 2003.
4. W.H. Ki, C.Y. Tsui and P. Mok, "Power management systems with an extremely low supply voltage", US Provisional Patent Application, 2005.
5. W.H. Ki, F. Su and C.Y. Tsui, "Charge redistribution loss consideration in optimal charge pump design", IEEE Int'l Symp. on Ckts. & Sys., 2005.