Low-voltage Wilson current mirrors in CMOS

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2007, Pages 2220-2223

  Minch, Bradley A ^a  

^a FRANKLIN W OLIN COLLEGE OF ENGINEERING   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; MIRRORS;

LOW-VOLTAGE CMOS ANALOGS; MOSIS; SATURATION VOLTAGES; WILSON CURRENT MIRRORS;

CMOS INTEGRATED CIRCUITS;

EID: 34548831112     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.378723     Document Type: Conference Paper

References (8)

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2. _, June 2002, private communication.
3. G. R. Wilson, "A Monolithic Junction FET-n-p-n Operational Amplifier," IEEE Journal of Solid-State Circuits, vol. SC-3, no. 4, pp. 341-348, 1968.
4. B. L. Hart and R. W. J. Barker, "D. C. Matching Errors in the Wilson Current Source," Electronics Letters, vol. 12, no. 15, pp. 389-390, 1976.
5. E. A. Vittoz, "Low-Power/Low-Voltage Circuit Design," in Practical Aspects of Analog and Mixed-Mode IC Design, vol. 1, Portland, Oregon, June 15-19, 1998, pp. LP-1-LP-42.
6. J. E. Meyer, "MOS Models and Circuit Simulation," RCA Review, vol. 32, no. 1, pp. 42-63, 1971.
7. B. A. Minch, "A Low-Voltage MOS Cascode Bias Circuit for All Current Levels," in Proc. ISCAS'02, vol. 3, Phoenix, AZ, May 2002, pp. 619-622.
8. _, "A Low-Voltage MOS Cascode Current Mirror for All Current Levels," in Proc. 45th MWSCAS, vol. 2, Tulsa, OK, August 2002, pp. 53-56.