Hardware acceleration of matrix multiplication on a xilinx FPGA

Proceedings - Fifth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'07

Volumn , Issue , 2007, Pages 97-100

  Dave, Nirav ^a   Fleming, Kermin ^a   King, Myron ^a   Pellauer, Michael ^a   Vijayaraghavan, Muralidaran ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 34548826218     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MEMCOD.2007.371239     Document Type: Conference Paper

References (4)

1. Bluespec Inc. http://www.bluespec.com.
2. Forrest Brewer and James C. Hoe. The First MEMOCODE HW/SW Co-design Contest. https://memocode07.ece.cmu.edu/contest.html, March 2007.
3. IBM, Inc. The CoreConnect (TM) Bus Architecture, 1999.
4. V. Strassen. Gaussian elimination is not optimal. In Numerische Mathematik 13, pages 354-356, 1969.