Partial dynamic reconfiguration in a multi-FPGA clustered architecture based on linux

Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM

Volumn , Issue , 2007, Pages

  Rana, Vincenzo ^a   Santambrogio, Marco ^a   Sciuto, Donatella ^a   Kettelhoit, Boris ^b   Koester, Markus ^b   Porrmann, Mario ^b   Rückert, Ulrich ^b  

^a POLITECNICO DI MILANO   (Italy)

^b UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER OPERATING SYSTEMS; EMBEDDED SYSTEMS; PARALLEL PROCESSING SYSTEMS; PROGRAM PROCESSORS; USER INTERFACES;

COMMUNICATION MANAGEMENT; PARTIAL DYNAMIC RECONFIGURATION; RESOURCE MANAGEMENT;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34548803446     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2007.370363     Document Type: Conference Paper

References (11)

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