Statistical analysis during the reliability simulation

Microelectronics Reliability

Volumn 47, Issue 9-11 SPEC. ISS., 2007, Pages 1353-1357

  Bestory, C ^a   Marc, F ^a   Levi, H ^a  

^a UNIVERSITÉ DE BORDEAUX   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SIMULATION; FAILURE ANALYSIS; RELIABILITY ANALYSIS; STATISTICAL METHODS;

FAILURE TIME DISPERSIONS; RELIABILITY HANDLING; RELIABILITY SIMULATION;

INTEGRATED CIRCUIT TESTING;

EID: 34548677068     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2007.07.079     Document Type: Article

References (5)

1. Bestory C, Marc F, Levi H. Multi-Level modeling of hot carrier injection for reliability simulation using VHDL-AMS. Forum on specification and design languages, FDL, 2006.
2. Marc F, Mongellaz B, Danto Y. Reliability simulation of electronic circuits with VHDL-AMS. In: Christoph Grimm, editor. Languages of system specification and verification, 2004. p. 217-228.
3. Inohira S., Shinmi T., Nagata M., Toyabe T., and Iida K. A statistical model including parameter matching for analog integrated circuits simulation. IEEE Trans Electron Dev 32 10 (1985) 2177-2183
4. Michael C., Abel C., and Ismail M. SMOS: a CAD compatible statistical model for analog MOS integrated circuit simulation. Int J Circ Theory App 20 (1992) 327-348
5. Hu C. IC reliability simulation. IEEE J Solid-State Circuits 27 3t (1992)