-
2
-
-
34548353585
-
-
Stretch, http://www.stretchinc.com.
-
-
-
Stretch1
-
3
-
-
17844363460
-
Architecture Exploration for a Reconfigurable Architecture Template
-
B. Mei, A. Lambrechts, D. Verkest, J. Mignolet and R. Lauwereins, "Architecture Exploration for a Reconfigurable Architecture Template," in IEEE Design & Test, 2005.
-
(2005)
IEEE Design & Test
-
-
Mei, B.1
Lambrechts, A.2
Verkest, D.3
Mignolet, J.4
Lauwereins, R.5
-
5
-
-
84893597192
-
EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability
-
A. Halambi, P. Grun, V. Ganesh, A. Khare, N. Dutt, and A. Nicolau, "EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability," in Proc. of the Conference on Design, Automation & Test in Europe (DATE), 1999.
-
(1999)
Proc. of the Conference on Design, Automation & Test in Europe (DATE)
-
-
Halambi, A.1
Grun, P.2
Ganesh, V.3
Khare, A.4
Dutt, N.5
Nicolau, A.6
-
6
-
-
34548353586
-
-
Target Compiler Technologies
-
Target Compiler Technologies, http://www.retarget.com.
-
-
-
-
7
-
-
85008025144
-
-
A. Hoffmann, T. Kogel, A. Nohl, G. Braun, O. Schliebusch, O. Wahlen, A. Wieferink, and H. Meyr, A Novel Methodology for the Design of Application Specific Instruction-Set Processor Using a Machine Description Language, in IEEE Transactions on Computer-Aided Design of Integrated Cicuits and Systems (TCAD) 20 no. 11, pp. 1338-1354, IEEE, 2001.
-
A. Hoffmann, T. Kogel, A. Nohl, G. Braun, O. Schliebusch, O. Wahlen, A. Wieferink, and H. Meyr, "A Novel Methodology for the Design of Application Specific Instruction-Set Processor Using a Machine Description Language," in IEEE Transactions on Computer-Aided Design of Integrated Cicuits and Systems (TCAD) vol. 20 no. 11, pp. 1338-1354, IEEE, 2001.
-
-
-
-
8
-
-
0036709503
-
Reconfigurable instruction set processors from a hardware/software perspective
-
F. Barat, R. Lauwereins, and G. Deconinck, "Reconfigurable instruction set processors from a hardware/software perspective," IEEE Trans. Softw. Eng., vol. 28, no. 9, pp. 847-862, 2002.
-
(2002)
IEEE Trans. Softw. Eng
, vol.28
, Issue.9
, pp. 847-862
-
-
Barat, F.1
Lauwereins, R.2
Deconinck, G.3
-
9
-
-
33746317587
-
A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture
-
C. Mucci, F. Campi, A. Deledda, A. Fazzi, M. Ferri, M. Bocchi, "A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture," in Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05), 2005.
-
(2005)
Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05)
-
-
Mucci, C.1
Campi, F.2
Deledda, A.3
Fazzi, A.4
Ferri, M.5
Bocchi, M.6
-
10
-
-
84944138710
-
A Software Development Tool chain for a Reconfigurable Processor
-
A. L. Rosa, L. Lavagno and C. Passerone, "A Software Development Tool chain for a Reconfigurable Processor," in Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems.
-
Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
-
-
Rosa, A.L.1
Lavagno, L.2
Passerone, C.3
-
11
-
-
33947673354
-
Design of Application Specific Processors for the Cached FFT Algorithm
-
H. Ishebabi, D. Kammler et al., "Design of Application Specific Processors for the Cached FFT Algorithm," in 31st International Conference on Acoustics, Speech, and Signal Processing, 2006.
-
(2006)
31st International Conference on Acoustics, Speech, and Signal Processing
-
-
Ishebabi, H.1
Kammler, D.2
-
12
-
-
34047217807
-
Design and Implementation of a Modular and Portable IEEE 754 Compliant Floating-Point Unit
-
K. Karuri, R. Leupers, G. Ascheid, H. Meyr and M. Kedia, "Design and Implementation of a Modular and Portable IEEE 754 Compliant Floating-Point Unit," in Design, Automation & Test in Europe (DATE), 2006.
-
(2006)
Design, Automation & Test in Europe (DATE)
-
-
Karuri, K.1
Leupers, R.2
Ascheid, G.3
Meyr, H.4
Kedia, M.5
-
13
-
-
27944470535
-
Fine-grained Application Source Code Profiling for ASIP Design
-
K. Karuri, M. A. Al Faruque, S. Kraemer, R. Leupers, G. Ascheid and H. Meyr, "Fine-grained Application Source Code Profiling for ASIP Design," in 42nd Design Automation Conference, 2005.
-
(2005)
42nd Design Automation Conference
-
-
Karuri, K.1
Al Faruque, M.A.2
Kraemer, S.3
Leupers, R.4
Ascheid, G.5
Meyr, H.6
-
14
-
-
8744241430
-
The MOLEN Polymorphic Processor
-
E. M. Panainte, S. Vassiliadis, S. Wong, G. Gaydadjiev, K. Bertels and G. Kuzmanov, "The MOLEN Polymorphic Processor," IEEE Transactions on Computers, vol. 53, no. 11, pp. 1363-1375, 2004.
-
(2004)
IEEE Transactions on Computers
, vol.53
, Issue.11
, pp. 1363-1375
-
-
Panainte, E.M.1
Vassiliadis, S.2
Wong, S.3
Gaydadjiev, G.4
Bertels, K.5
Kuzmanov, G.6
-
15
-
-
33746904375
-
ISEGEN: An Iterative Improvement-based ISE Generation Technique for Fast Customization of Processors
-
P. Biswas, S. Banerjee, N. Dutt, L. Pozzi and P. Ienne, "ISEGEN: an Iterative Improvement-based ISE Generation Technique for Fast Customization of Processors," IEEE Transactions on VLSI Systems, vol. 14, no. 7, 2006.
-
(2006)
IEEE Transactions on VLSI Systems
, vol.14
, Issue.7
-
-
Biswas, P.1
Banerjee, S.2
Dutt, N.3
Pozzi, L.4
Ienne, P.5
-
17
-
-
34047130293
-
A Design Flow for Configurable Embedded Processors based on Optimized Instruction Set Extension Synthesis
-
R. Leupers, K. Karuri, S. Kraemer and M. Pandey, "A Design Flow for Configurable Embedded Processors based on Optimized Instruction Set Extension Synthesis," in Design, Automation & Test in Europe (DATE), 2006.
-
(2006)
Design, Automation & Test in Europe (DATE)
-
-
Leupers, R.1
Karuri, K.2
Kraemer, S.3
Pandey, M.4
-
18
-
-
34548343655
-
-
Synopsys, http://www.synopsys.com.
-
-
-
Synopsys1
-
19
-
-
34548368208
-
-
Xilinx, Virtex-II pro http://www.xilinx.com/products/ silicon_solutions/fpgas/.
-
Virtex-II pro
-
-
Xilinx1
-
20
-
-
4444275354
-
Introduction of Local Memory Elements in Instruction Set Extensions
-
P. Biswas, V. Choudhary, K. Atasu, L. Pozzi, P. Ienne and N. Dutt, "Introduction of Local Memory Elements in Instruction Set Extensions," in DAC '04: Proceedings of the 41st annual conference on Design automation, 2004.
-
(2004)
DAC '04: Proceedings of the 41st annual conference on Design automation
-
-
Biswas, P.1
Choudhary, V.2
Atasu, K.3
Pozzi, L.4
Ienne, P.5
Dutt, N.6
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