Plasma etching system and its applications to 45-32-nm leading-edge devices

Hitachi Review

Volumn 56, Issue 3, 2007, Pages 57-62

  Enami, Hiromichi ^a,b,c   Sakaguchi, Masamichi ^a,b   Itabashi, Naoshi ^a,c,d   Izawa, Masaru ^a,c,d,e  

^a HITACHI LTD   (Japan)

^b HITACHI HIGH TECHNOLOGIES CORPORATION   (Japan)

^c JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^d Central Research Laboratory

^e Chemical Society of   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 34548312238     PISSN: None     EISSN: 0018277X     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (7)

1. Semiconductor Association, "International Technology Roadmap for Semiconductors," (2005).
2. H. Enami et al., "Strategy and Recent Activities for Equipment and Process Stabilization of Dry Etch," 2005 Japan Semiconductor Technology Symposium (2005).
3. J. Pettinato et al., "An ITRS View on Future Process Control Challenges and Opportunities," AEC/APC Symposium (2003).
4. H. Enami et al., "Process Environment Monitoring of Plasma Etching for APC," American Vacuum Society Fall Meeting, MS-ThM7-01 (1998).
5. H. Ogihara et al., "Semiconductor Manufacturing Process-Multi- Variable Control," 2004 Spring Meeting on the Japan Society for Precision Engineering (2004).
6. H. Kobayashi et al., "Proceedings of Int. Symp, Dry Process," p.261 (2005).
7. T. Iwakoshi et al., "Proc. Int. Symp, Dry Process," p.333 (2006).