Hard real-time reconfiguration port scheduling

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 123-128

  Dittmann, Florian ^a   Frank, Stefan ^a  

^a UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM PROCESSORS; REAL TIME SYSTEMS; SCHEDULING ALGORITHMS;

FPGA REAL-TIME SCHEDULING; MONOPROCESSOR SCHEDULING ALGORITHMS; RECONFIGURATION PORT;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34548295436     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364578     Document Type: Conference Paper

References (21)

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