A 12-Gb/s DEMUX implemented with sige high-speed FPGA circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 9, 2007, Pages 1051-1054

  You, Chao ^a   Guo, Jong Ru ^b   Kraft, Russell P ^c   Chu, Michael ^c   Goda, Bryan ^d   McDonald, John F ^c  

^a North Dakota State University   (United States)

^b IBM   (United States)

^c RENSSELAER POLYTECHNIC INSTITUTE   (United States)

^d UNITED STATES MILITARY ACADEMY   (United States)

Author keywords

Current mode logic (CML); Field programmable gate arrays (FPGAs); Programmable logic arrays; Silicon germanium

Indexed keywords

DEMULTIPLEXING; ELECTRIC CURRENTS; GERMANIUM COMPOUNDS; PROGRAMMABLE LOGIC CONTROLLERS; SILICON COMPOUNDS;

CELL STRUCTURE; CURRENT MODE LOGIC (CML); PROGRAMMABLE LOGIC ARRAYS; SILICON GERMANIUM;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34548104962     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.902208     Document Type: Article

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